1. Field of the Invention
The present invention relates to an image forming processing circuit having a clock stop function for decreasing power consumption and an image forming apparatus used in a copying machine and the like that uses the image forming processing circuit.
2. Description of the Related Art
As an electric constitution of an image forming apparatus (hereinafter, MFP) used as a copying machine or the like, circuits are integrated in a dedicated LSI (hereinafter, ASIC) as an image forming processing circuit. Therefore, power consumption of the ASIC substantially affects power consumption as a circuit portion of the electric constitution of the MFP. Thus, various proposals for realizing power saving have been made. For example, as described in JP-A-2002-229666, it is also proposed to statically stop a reference clock for a function not in use of the ASIC.
In the proposal for power saving of this type, when output is not performed in an operation of the MFP, a CPU or the like judges a state of the MFP and actuates a sleep function to realize the power saving. The sleep function is a function for activating a clock stop function for an ASIC capable of stopping a clock among ASICs on the electric constitution and stopping an internal circuit operation to reduce power consumption.
However, when the CPU or the like controls the sleep function, it is difficult to reduce power consumption by fine stop control of the clock. This is because the CPU or the like controls the clock stop function judging from an operation state of the entire MFP. In other words, since the CPU or the like manages control of the clock stop function as a system as a whole and performs activation start and activation reset control of the clock stop function, it is difficult to perform fine individual control of each ASIC. Thus, there is a problem in that a low power consumption effect is low.